Data Sheet.
HY[B/E]18L512160BF-7.5
512-Mbit Mobile-RAM
1
Overview
1.1
Features
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4 banks × 8 Mbit × 16 organization
Fully synchronous to positive clock edge
Four internal banks for concurrent operation
Programmable CAS latency: 2, 3
Programmable burst length: 1, 2, 4, 8 or full page
Programmable wrap sequence: sequential or interleaved
Programmable drive strength
Auto refresh and self refresh modes
8192 refresh cycles / 64 ms
Auto precharge
Commercial (0°C to +70°C) and Extended (-25°C to +85°C) operating temperature range
Dual-Die 54-ball PG-TFBGA package (12.0 × 8.0 × 1.2 mm)
RoHS Compliant Products1)
Power Saving Features
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Low supply voltages: VDD = 1.70 V to 1.95 V, VDDQ = 1.70 V to 1.95 V
Optimized self refresh (IDD6) and standby currents (IDD2 / IDD3
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Programmable Partial Array Self Refresh (PASR)
Temperature Compensated Self-Refresh (TCSR), controlled by on-chip temperature sensor
Power-Down and Deep Power Down modes
TABLE 1
Performance
Part Number Speed Code
- 7.5
Unit
Speed Grade
Access Time (tACmax
133
6.0
7.0
7.5
9.5
MHz
ns
ns
ns
ns
)
CL = 3
CL = 2
CL = 3
CL = 2
Clock Cycle Time (tCKmin
)
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Rev. 1.22, 2006-12
3
01132005-06IU-IGVM
QIMONDA [ QIMONDA AG ]
