Internet Data Sheet
HYB25DC128[800/160]C[E/F]
128-Mbit Double-Data-Rate SDRAM
%$ꢃ %$ꢀ $ꢃꢃ $ꢃꢀ
$ꢉ
$ꢈ
$ꢇ
$ꢆ
$ꢂ
$ꢁ
$ꢅ
$ꢄ
$ꢃ
'6
$ꢀ
'//
ꢀ
ꢃ
02'(
03%'ꢄꢃꢀꢀ
TABLE 8
Extended Mode Register
Field
Bits
Type1)
Description
DLL Status
DLL
0
w
0B
1B
Enabled
Disabled
DS
1
Drive Strength
0B
1B
Normal
Weak
MODE
[11:2]
Operating Mode
0000000000BNormal Operation
Notes
1. A2 must be 0 to provide compatibility with early DDR devices
2. All other bit combinations are RESERVED
1) w = write only register bit
Rev. 1.1, 2007-01
13
03062006-JXUK-E7R1