Internet Data Sheet
HYB25D512[40/16/80]0B[E/F/C/T](L)
Double-Data-Rate SDRAM
Ball#/Pin#
Name
Pin
Type
Buffer
Type
Function
Data Strobe ×8 organisation
E3, 51 DQS I/O
SSTL
Data Strobe
Note: Output with read data, input with write data. Edge-aligned with
read data, centered in write data. Used to capture write data.
Data Mask ×8 organization
F3, 47 DM
I
SSTL
Data Mask
Note: DM is an input mask signal for write data. Input data is masked
when DM is sampled HIGH coincident with that input data during
a Write access. DM is sampled on both edges of DQS. Although
DM pins are input only, the DM loading matches the DQ and DQS
loading.
Data Signals ×16 organization
A8, 2
DQ0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Data Signal 15:0
B9, 4
DQ1
B7, 5
DQ2
C9, 7
DQ3
C7, 8
DQ4
D9, 10
D7, 11
E9, 13
E1, 54
D3, 56
D1, 57
C3, 59
C1, 60
B3, 62
B1, 63
A2, 65
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Data Strobe ×16 organization
E3, 51
UDQS
I/O
SSTL
SSTL
Data Strobe Upper Byte
Data Strobe Lower Byte
E7, 16
LDQS
I/O
Data Mask ×16 organization
F3, 47
UDM
LDM
I
I
SSTL
SSTL
Data Mask Upper Byte
Data Mask Lower Byte
F7, 20
Power Supplies
F1, 49
VREF
AI
—
—
I/O Reference Voltage
A9, B2, C8, D2, VDDQ
E8, 3, 9, 15, 55,
61
PWR
I/O Driver Power Supply
A7, F8, M7, 1, VDD
PWR
—
Power Supply
18, 33
Rev. 1.70, 2007-11
9
03062006-PFFJ-YJY2
QIMONDA [ QIMONDA AG ]
