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HYB25D256400BCL-7 参数 Datasheet PDF下载

HYB25D256400BCL-7图片预览
型号: HYB25D256400BCL-7
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 64MX4, 0.75ns, CMOS, PBGA60]
分类和应用: 时钟动态存储器双倍数据速率内存集成电路
文件页数/大小: 83 页 / 3071 K
品牌: QIMONDA [ QIMONDA AG ]
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HYB25D256[400/800/160]B[T/C](L)  
256-Mbit Double Data Rate SDRAM  
Electrical Characteristics  
4.2  
Normal Strength Pull-down and Pull-up Characteristics  
1. The nominal pulldown V-I curve for DDR SDRAM devices is expected, but not guaranteed, to lie within the  
inner bounding lines of the V-I curve.  
2. The full variation in driver pulldown current from minimum to maximum process, temperature, and voltage lie  
within the outer bounding lines of the V-I curve.  
3. The nominal pullup V-I curve for DDR SDRAM devices is expected, but not guaranteed, to lie within the inner  
bounding lines of the V-I curve.  
4. The full variation in driver pullup current from minimum to maximum process, temperature, and voltage lie  
within the outer bounding lines of the V-I curve.  
5. The full variation in the ratio of the maximum to minimum pullup and pulldown current does not exceed 1.7, for  
device drain to source voltages from 0.1 to 1.0.  
6. The full variation in the ratio of the nominal pullup to pulldown current should be unity ± 10%, for device drain  
to source voltages from 0.1 to 1.0 V.  
140  
Maximum  
120  
100  
Nominal High  
80  
60  
40  
Nominal Low  
Minimum  
20  
0
0
0.5  
1
1.5  
2
2.5  
VDDQ - VOUT (V)  
Figure 33 Normal Strength Pull-down Characteristics  
0
-20  
-40  
-60  
-80  
Minimum  
Nominal Low  
-100  
-120  
-140  
-160  
Nominal High  
Maximum  
0
0.5  
1
1.5  
2
2.5  
VDDQ - Vout(V)  
Figure 34 Normal Strength Pull-up Characteristics  
Data Sheet  
56  
Rev. 1.21, 2004-07  
02102004-TSR1-4ZWW  
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