Internet Data Sheet
HYB18T256161BF–20/25/28
256-Mbit Double-Data-Rate-Two SDRAM
HYB18T256161BF–20/25/28
Revision History: 2007-06, Rev. 1.20
Page
Subjects (major changes since last revision)
Typos corrected
All
Previous Revision: Rev. 1.0, 2006-09
All Final Data Sheet
Previous Revision: Rev. 0.60, 2006-09
94-101
added chapter 7 explaining AC timing measurement condition (reference load ; slew rate ; set up & hold timing
references ; derating values for input /command ,data )
82-86
All
setup & hold timings are changed with reference to Industrial standard definition
removed all the occurances of RDQS as it in not used in graphics (x16)
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