Internet Data Sheet
HYB18TC512[80/16]0BF
512-Mbit Double-Data-Rate-Two SDRAM
1.2
Description
The 512-Mb DDR2 DRAM is a high-speed Double-Data-
Rate-Two CMOS DRAM device containing 536,870,912 bits
and is internally configured as an quad-bank DRAM. The
512-Mb device is organized as either 16 Mbit ×8 I/O ×
4 banks or 8 Mbit ×16 I/O ×4 banks chip. These devices
achieve high speed transfer rates starting at 400 Mb/sec/pin
for general applications. See Table 1 for performance figures.
latched at the cross point of differential clocks (CK rising and
CK falling). All I/Os are synchronized with a single ended
DQS or differential DQS-DQS pair in a source synchronous
fashion.
A 16-bit address bus for ×8 organized components and a
15-bit address bus for ×16 components is used to convey
row, column and bank address information in a RAS-CAS
multiplexing style.
The device is designed to comply with all DDR2 DRAM key
features:
The DDR2 device operates with a 1.8 V ± 0.1 V power
supply. An Auto-Refresh and Self-Refresh mode is provided
along with various power-saving power-down modes.
1. Posted CAS with additive latency
2. Write latency = read latency - 1
3. Normal and weak strength data-output driver
4. Off-Chip Driver (OCD) impedance adjustment
5. On-Die Termination (ODT) function
The functionality described and the timing specifications
included in this data sheet are for the DLL Enabled mode of
operation.
All of the control and address inputs are synchronized with a
pair of externally supplied differential clocks. Inputs are
The DDR2 SDRAM is available in FBGA package.
TABLE 5
Ordering Information for Lead-Free Products (RoHS Compliant)
Product Type1)
HYB18TC512160BF-25F ×16 DDR2-800D 5-5-5
HYB18TC512800BF-25F ×8 DDR2-800D 5-5-5
×16 DDR2-800E 6-6-6
×8 DDR2-800E 6-6-6
×16 DDR2-667D 5-5-5
×8 DDR2-667D 5-5-5
×16 DDR2-533C 4-4-4
×8 DDR2-533C 4-4-4
×16 DDR2-400B 3-3-3
×8 DDR2-400B 3-3-3
Org. Speed
CAS-RCD-RP Latencies2)
Clock (MHz) Package
Note
3)
400
400
400
400
333
333
266
266
200
200
PG-TFBGA-84
PG-TFBGA-60
PG-TFBGA-84
PG-TFBGA-60
PG-TFBGA-84
PG-TFBGA-60
PG-TFBGA-84
PG-TFBGA-60
PG-TFBGA-84
PG-TFBGA-60
HYB18TC512160BF-2.5
HYB18TC512800BF-2.5
HYB18TC512160BF-3S
HYB18TC512800BF-3S
HYB18TC512160BF-3.7
HYB18TC512800BF-3.7
HYB18TC512160BF-5
HYB18TC512800BF-5
1) Please check with your Qimonda representative that leadtime and availability of your preferred device type and version meet your project
requirements.
2) CAS: Column Address Strobe, RCD: Row Column Delay, RP: Row Precharge
3) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Note: For product nomenclature see Chapter 9 of this data sheet
Rev. 1.21, 2007-09
5
03292006-HDLH-OAY6
QIMONDA [ QIMONDA AG ]
