Internet Data Sheet
HYB18TC256[80/16]0BF
256-Mbit Double-Data-Rate-Two SDRAM
Ball#
Name
Ball
Type
Buffer
Type
Function
Data Signals ×16 Organization
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
DQ0
DQ1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Data Signal 15:0
Note: Bi-directional data bus. DQ[15:0] for ×16 components
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Data Strobe ×16 Organization
B7
A8
F7
E8
UDQS
UDQS
LDQS
LDQS
I/O
I/O
I/O
I/O
SSTL
SSTL
SSTL
SSTL
Data Strobe Upper Byte
Data Strobe Lower Byte
Data Mask ×16 Organization
B3
F3
UDM
LDM
I
I
SSTL
SSTL
Data Mask Upper Byte
Data Mask Lower Byte
Power Supplies ×16 Organization
J2
VREF
AI
–
–
I/O Reference Voltage
C1, C3, C7, C9, VDDQ
E9, G1, G3, G7,
G9
PWR
I/O Driver Power Supply
J1
VDDL
PWR
PWR
–
–
Power Supply
Power Supply
A1, E1, J9, M9, VDD
R1
A7, A9, D2, D8, VSSQ
E7, F2, F8, H2,
H8
PWR
–
Power Supply
J7
VSSDL
PWR
PWR
–
–
Power Supply
Power Supply
A3, E3, J3, N1, VSS
P9
Not Connected ×16 Organization
A2, E2, L1, R3, NC
R7, R8
NC
–
Not Connected
Rev. 1.3, 2007-05
11
07182006-DD60-22E6
QIMONDA [ QIMONDA AG ]
