Internet Data Sheet
HY[B/I]18TC256[80/16]0AF
256-Mbit Double-Data-Rate-Two SDRAM
Ball#
Name
Ball
Type
Buffer
Type
Function
Data Signals ×8 Organization
C8
C2
D7
D3
D1
D9
B1
B9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Data Signal 7:0
Data Strobe ×8 Organisation
B7
A8
B3
A2
DQS
I/O
I/O
O
SSTL
SSTL
SSTL
SSTL
Data Strobe
DQS
RDQS
RDQS
Read Data Strobe
O
Data Mask ×8 Organization
B3
DM
I
SSTL
–
Data Mask
Power Supplies
A9, C1, C3, C7, VDDQ
PWR
I/O Driver Power Supply
C9
A1, L1, E9, H9 VDD
PWR
PWR
–
–
Power Supply
A7, B2, B8, D2, VSSQ
I/O Driver Power Supply
D8
A3, E3, J1, K9 VSS
PWR
AI
–
–
–
–
Power Supply
E2
E1
E7
VREF
VDDL
VSSDL
I/O Reference Voltage
Power Supply
PWR
PWR
Power Supply
Not Connected ×8 Organization
G1, L3, L7, L8 NC NC
Other Balls ×8 Organization
F9 ODT
–
Not Connected
I
SSTL
On-Die Termination Control
Rev. 1.3, 2007-11
8
03062006-H3V1-XJT4
Date: 2007-11-23
QIMONDA [ QIMONDA AG ]
