Internet Data Sheet
HYB18TC1G[80/16]0AF
1-Gbit DDR2 SDRAM
Ball#/Pin#
Name
A13
Pin
Type
Buffer
Type
Function
R8
I
SSTL
Address Signal 13
Note: 512 Mbit ×8 and 1 Gbit ×8 components
Note: 256 Mbit
NC
–
–
Data Signals ×8 Organizations
G8
G2
H7
H3
H1
H9
F1
F9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Data Signal 3:0
Note: DQ[7:0] for ×8 components
Data Signal 7:4
Data Strobe ×8 Organizations
F7
E8
DQS
DQS
I/O
I/O
SSTL
SSTL
Data Strobe
Data Strobe ×8 Organizations
F3
E2
RDQS
RDQS
O
O
SSTL
SSTL
Read Data Strobe
Data Mask ×8 Organizations
F3 DM
Power Supplies ×8 Organizations
I
SSTL
–
Data Mask
E9,G1,G3,G7, VDDQ
PWR
I/O Driver Power Supply
G9
E1,J9,M9,R1
VDD
PWR
PWR
–
–
Power Supply
E7,F2,F8,H2,H VSSQ
I/O Driver Power Supply
8
E3,J3;N1,P9
VSS
PWR
Al
–
–
–
–
Power Supply
J2
J1
J7
VREF
VDDL
VSSDL
I/O Reference Voltage
Power Supply
PWR
PWR
Power Supply
Not Connected ×8 Organization
A1,A2,A8,A9,R NC
7,W1,W2,W8,
W9,R3
NC
–
Not Connected
Other Pins ×8 Organizations
K9 ODT
I
SSTL
On-Die Termination Control
Rev. 1.11, 2006-09
7
03292006-PJAE-UQLG