Internet Data Sheet
HY[B/I]18T1G[40/80/16]0C2[C/F]
1-Gbit Double-Data-Rate-Two SDRAM
Parameter
Symbol
DDR2–533
DDR2–400
Unit
Notes1)2)
3)4)5)6)
Min.
Max.
Min.
Max.
12)
10)
Data-out high-impedance time from tHZ
CK / CK
—
tAC.MAX
—
tAC.MAX
ps
Address and control input hold time tIH.BASE
375
0.6
—
—
475
0.6
—
—
ps
Address and control input pulse
tIPW
tCK
width
(each input)
10)
13)
Address and control input setup time tIS.BASE
250
—
350
—
ps
ps
DQ low-impedance time from CK / tLZ(DQ)
2 × tAC.MIN
tAC.MAX
2 × tAC.MIN
tAC.MAX
CK
13)
DQS low-impedance from CK / CK tLZ(DQS)
tAC.MIN
tAC.MAX
tAC.MIN
tAC.MAX
ps
ns
MRS command to ODT update
delay
tMOD
0
12
0
12
Mode register set command cycle
time
tMRD
2
—
2
—
tCK
OCD drive mode output delay
Data output hold time from DQS
Data hold skew factor
tOIT
0
12
0
12
ns
tQH
t
HP –tQHS
—
t
HP –tQHS
—
tQHS
tREFI
tREFI
tRFC
—
400
7.8
3.9
—
—
—
450
7.8
3.9
—
ps
μs
μs
ns
13)14)
15)17)
16)
Average periodic refresh Interval
Average periodic refresh Interval
—
—
—
Auto-Refresh to Active/Auto-
Refresh command period
127.5
127.5
13)
Read preamble
Read postamble
tRPRE
tRPST
tRRD
0.9
1.1
0.60
—
0.9
1.1
0.60
—
tCK
tCK
ns
13)
0.40
7.5
0.40
7.5
13)17)
Active bank A to Active bank B
command period for 1 KB page size
15)21)
Active bank A to Active bank B
command period for 2 KB page size
tRRD
10
—
—
10
—
—
ns
ns
Internal Read to Precharge
command delay
tRTP
7.5
7.5
Write preamble
Write postamble
tWPRE
tWPST
0.25
0.40
15
—
0.25
0.40
15
—
tCK
tCK
ns
18)
0.60
—
0.60
—
Write recovery time for write without tWR
Auto-Precharge
19)
20)
Internal Write to Read command
delay
tWTR
7.5
2
—
—
10
2
—
—
ns
Exit power down to any valid
command
tXARD
tCK
(other than NOP or Deselect)
20)
Exit active power-down mode to
Read command (slow exit, lower
power)
tXARDS
6 – AL
—
6 – AL
—
tCK
Rev. 1.02, 2008-01
50
09262007-3YK7-BKKG
QIMONDA [ QIMONDA AG ]
