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HYB18T1G160AF-3.7 参数 Datasheet PDF下载

HYB18T1G160AF-3.7图片预览
型号: HYB18T1G160AF-3.7
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 64MX16, 0.5ns, CMOS, PBGA92, ROHS COMPLIANT, PLASTIC, TFBGA-92]
分类和应用: 时钟动态存储器双倍数据速率内存集成电路
文件页数/大小: 53 页 / 2560 K
品牌: QIMONDA [ QIMONDA AG ]
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HYB18T1G[40/80/16]0AF(L)–[3S/3.7/5]  
1-Gbit DDR2 SDRAM  
Overview  
1
Overview  
This chapter gives an overview of the 1-Gbit DDR2 SDRAM product family and describes its main characteristics.  
1.1  
Features  
The 1-Gbit DDR2 SDRAM offers the following key features:  
1.8 V ± 0.1 V Power Supply  
Data masks (DM) for write data  
1.8 V ± 0.1 V (SSTL_18) compatible I/O  
DRAM organisations with 4, 8 and 16 data  
in/outputs  
Double Data Rate architecture: two data transfers  
per clock cycle, eight internal banks for concurrent  
operation  
Posted CAS by programmable additive latency for  
better command and data bus efficiency  
Off-Chip-Driver impedance adjustment (OCD) and  
On-Die-Termination (ODT) for better signal quality.  
Auto-Precharge operation for read and write bursts  
Auto-Refresh, Self-Refresh and power saving  
Power-Down modes  
Average Refresh Period 7.8 µs at a TCASE lower  
than 85 °C, 3.9 µs between 85 °C and 95 °C  
High Temperature Self Refresh Mode is supported  
Normal and Weak and reduced Strength Data-  
Output Drivers  
CAS Latency: 3, 4 and 5  
Burst Length: 4 and 8  
Differential clock inputs (CK and CK)  
Bi-directional, differential data strobes (DQS and  
DQS) are transmitted / received with data. Edge  
aligned with read data and center-aligned with write  
data.  
DLL aligns DQ and DQS transitions with clock  
DQS can be disabled for single-ended data strobe  
operation  
1 KByte page size  
Lead-free Packages:  
P-TFBGA-68 for ×4 & ×8 components, P-TFBGA-  
92 for ×16 components  
Commands entered on each positive clock edge,  
data and data mask are referenced to both edges of  
DQS  
RoHS Compliant Products1)  
Table 1  
Performance table for DDR2–667D  
Product Type Speed Code  
Speed Grade  
–3S  
Unit  
DDR2–667D 5–5–5  
Max. Clock Frequency  
@CL5  
@CL4  
@CL3  
fCK5  
fCK4  
fCK3  
tRCD  
tRP  
333  
266  
200  
15  
MHz  
MHz  
MHz  
ns  
Min. RAS-CAS-Delay  
Min. Row Precharge Time  
Min. Row Active Time  
Min. Row Cycle Time  
15  
ns  
tRAS  
tRC  
45  
ns  
60  
ns  
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and  
electronic equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the  
Council of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium,  
polybrominated biphenyls and polybrominated biphenyl ethers.  
Internet Data Sheet  
3
Rev. 1.31, 2007-01  
03292006-1X3H-6X8S