Internet Data Sheet
HYB18T1G[40/80/16]0C4F
1-Gbit Double-Data-Rate-Two SDRAM
2.3
Addressing
This chapter describes the DDR2 addressing.
TABLE 9
Addressing
Configuration
256 Mb x 41)
128 Mb x 82)
64 Mb x163)
Note
Bank Address
Number of Banks
Auto Precharge
Row Address
BA[2:0]
8
BA[2:0]
8
BA[2:0]
8
A10 / AP
A[13:0]
A11, A[9:0]
A10 / AP
A[13:0]
A[9:0]
10
A10 / AP
A[12:0]
A[9:0]
10
Column Address
4)
5)
Number of Column Address Bits 11
Number of I/Os
4
8
16
Page Size [Bytes]
1024 (1 K)
1024 (1 K)
2048 (2 K)
1) Referred to as ’org’
2) Referred to as ’org’
3) Referred to as ’org’
4) Referred to as ’colbits’
5) PageSize = 2colbits × org/8 [Bytes]
Rev. 1.01, 2008-11
17
04212008-66HT-ZLFE
QIMONDA [ QIMONDA AG ]
