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P1750AES-20QLMB 参数 Datasheet PDF下载

P1750AES-20QLMB图片预览
型号: P1750AES-20QLMB
PDF下载: 下载PDF文件 查看货源
内容描述: [Microprocessor, 16-Bit, 20MHz, CMOS, QFP-68]
分类和应用: 时钟外围集成电路
文件页数/大小: 22 页 / 220 K
品牌: PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
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P1750AE/SOS  
SIGNAL DESCRIPTIONS  
CLOCKSANDEXTERNALREQUESTS  
Mnemonic  
Name  
Description  
CPUCLK  
CPU clock  
A single phase input clock signal (0-30 MHz, 40 percent to 60 percent  
duty cycle.  
TIMERCLK  
Timer clock  
A 100 kHz input that, after synchronization with CPU CLK provides the  
clock for timer A and timer B. If timers are used, the CPU CLK signal  
frequency must be > 300 kHz.  
RESET  
Reset  
An active LOW input that initializes the device.  
CONREQ  
Consolerequest  
An active LOW input that initiates console operations after completion of  
the current instruction.  
INTERRUPTINPUTS  
Mnemonic  
Name  
Description  
PWRDNINT  
Powerdowninterrupt  
An interrupt request input that cannot be masked or disabled. This  
signal is active on the positive going edge or the high level, according to  
the interrupt mode bit in the configuration register.  
USR INT-  
Userinterrupt  
Interrupt request input signals that are active on the positive going  
edge or the high level, according to the interrupt mode bit in the  
configurationregister.  
0
USR INT  
5
IOL INT  
I/Olevelinterrupts  
Active HIGH interrupt request inputs that can be used to expand the  
numberofuserinterrupts.  
1
IOL INT  
2
FAULTS  
Mnemonic  
MEM PRT ER  
Name  
Description  
Memoryprotecterror  
An active LOW input generated by the MMU or BPU, or both and  
sampled by the BUS BUSY signal into the Fault Register (bit 0 CPU bus  
cycle, bit 1 if non-CPU bus cycle).  
MEM PAR ER  
EXTADRER  
Memoryparityerror  
An active LOW input sampled by the BUS BUSY signal into bit 2 of the  
faultregister.  
Externaladdress  
error  
An active LOW input sampled by the BUS BUSY signal into the Fault  
register (bit 5 or 8), depending on the cycle (memory or I/O).  
SYSFLT  
SYSFLT  
System fault ,  
Asynchronous, positive edge-sensitive inputs that set bit 7 (SYSFLT )  
0
0
1
0
System fault ,  
or bits 13 and 15 (SYSFLT ) in the Fault register.  
1
1
ERRORCONTROL  
Mnemonic  
Name  
Description  
UNRCVER  
Unrecoverableerror  
An active HIGH output that indicates the occurrence of an error classified  
asunrecoverable.  
MAJ ER  
Majorerror  
An active HIGH output that indicates the occurrence of an error classified  
as major.  
Do c um e nt # MICRO-7 REV B  
Pa g e 15 o f 22  
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