November 2006
rev 0.3
Table 1. Pin Configuration
Pin Number
3
4
5,6,7
32
8,11,15,20,24,27,31
25,29
18,22
9,13, 17
2
30,28,26
23,21,19
10,12,14,16
1
ASM2I99456
Pin
PECL_CLK,
PECL_CLK
FSELA, FSELB,
FSELC
MR/OE
GND
VCCA,
1
VCCB ,
VCCC
VCC
QA0 - QA2
QB0 - QB2
QC0 - QC3
NC
I/O
Input
Input
Input
Type
LVPECL
LVCMOS
LVCMOS
Supply
Supply
Supply
Function
Differential Clock reference
Low Voltage positive ECL input
Output bank divide select input
Internal reset and output tristate control
Negative Voltage supply output bank (GND)
Positive Voltage supply for output banks
Positive Voltage supply core (VCC)
Bank A Outputs
Bank B Outputs
Bank C Outputs
No Connect
Output
Output
Output
LVCMOS
LVCMOS
LVCMOS
Note:1 VCCB is internally connected to VCC.
Table 2. Supported Single and Dual Supply Configurations
Supply voltage
configuration
3.3V
Mixed voltage supply
2.5V
VCC
1
3.3V
3.3V
2.5V
VCCA
2
3.3V
3.3V or 2.5V
2.5V
VCCB
3
3.3V
3.3V
2.5V
VCCC
4
3.3V
3.3V or 2.5V
2.5V
GND
0V
0V
0V
Note: 1 VCC is the positive power supply of the device core and input circuitry. VCC voltage defines the input threshold and levels
2 VCCA is the positive power supply of the bank A outputs. VCCA voltage defines bank A output levels
3 VCCB is the positive power supply of the bank B outputs. VCCB voltage defines bank B output levels. VCCB is internally connected to VCC.
4 VCCC is the positive power supply of the bank C outputs. VCCC voltage defines bank C output levels
Table 3. Function Table (Controls)
Control
FSELA
FSELB
FSELC
MR/OE
Default
0
0
0
0
f
QA0:2
= f
REF
f
QB0:2
= f
REF
f
QC0:3
= f
REF
Outputs enabled
0
1
f
QA0:2
= f
REF
÷2
f
QB0:2
= f
REF
÷2
f
QC0:3
= f
REF
÷2
Internal reset
Outputs disabled (tristate)
Table 4. Absolute Maximum Ratings
1
Symbol
V
CC
V
IN
V
OUT
I
IN
I
OUT
T
S
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Current
DC Output Current
Storage temperature
-40
Characteristics
Min
-0.3
-0.3
-0.3
Max
4.6
V
CC
+0.3
V
CC
+0.3
±20
±50
125
Unit
V
V
V
mA
mA
°C
Condition
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
3.3V/2.5V LVCMOS Clock Fanout Buffer
Notice: The information in this document is subject to change without notice.
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