PE42851
Product Specification
Thermal Data
Though the insertion loss for this part is very low,
when handling high power RF signals, the junction
temperature rises significantly.
VSWR conditions that present short circuit loads to
the part can cause significantly more power
dissipation than with proper matching.
Special consideration needs to be made in the
design of the PCB to properly dissipate the heat
away from the part and maintain the 85°C maximum
case temperature. It is recommended to use best
design practices for high power QFN
packages: multi-layer PCBs with thermal vias in a
thermal pad soldered to the slug of the package.
Special care also needs to be made to alleviate
solder voiding under the part.
Table 6. Theta JC
Parameter
Theta JC (+85°C)
Min
Typ
20
Max
Unit
C/W
©2012-2013 Peregrine Semiconductor Corp. All rights reserved.
Page 8 of 12
Document No. DOC-13014-3
│
UltraCMOS
®
RFIC Solutions