PE42851
Product Specification
Figure 4. Pin Configuration (Top View)
1
32
GND
31
GND
30
GND
29
GND
27
GND
26
GND
25
GND
28
ANT
Table 3. Operating Ranges
1
Parameter
Supply voltage (normal
mode, Vss
EXT
= 0V)
Supply voltage (bypass
mode, Vss
EXT
= -3.4V,
V
DD
≥
3.4V for full spec.
compliance)
Negative supply voltage
(bypass mode)
Supply current (normal
mode, Vss
EXT
= 0V)
Supply current (bypass
mode, Vss
EXT
= -3.4V)
Negative supply current
(bypass mode, Vss
EXT
=
-3.4V)
Symbol
V
DD
Min
2.3
Typ
Max
5.5
Unit
V
V
DD
2.7
3.4
5.5
V
Vss
EXT
I
DD
I
DD
I
SS
V
IH
V
IL
P
IN-TX
P
IN-TX
-3.6
130
50
-40
-16
-3.2
200
80
V
µA
µA
µA
10
11
12
13
14
15
16
9
GND
GND
GND
Vss
EXT
V3
V2
V
DD
V1
Digital input high
(V1, V2, V3)
Digital input low
(V1, V2, V3)
TX RF input power
2,3
(VSWR
≤
8:1)
TX RF input power
2,3
(50Ω source/load
impedance)
TX RF input power
2
(50Ω source/load
impedance, CW)
ANT RF input power,
unbiased (VSWR
≤
8:1)
RX RF input power
2
(VSWR
≤
8:1)
Operating temperature
range (case)
Operating junction
temperature
1.17
-0.3
3.6
0.6
40
V
V
dBm
Note 1: Pins 1, 3, 5, 7, 9, 10, 17, 19, 20, 22, 24, 26, 27, 29, 30 and 31 can be
N/C if deemed necessary by the customer
Table 2. Pin Descriptions
Pin #
1, 3, 5-7, 9-
11, 17-20,
22, 24-27,
29-32
2
4
8
12
13
14
15
16
21
23
28
Pad
Notes:
Pin Name
Description
45
dBm
GND
TX1
2
TX2
1,2
RX
2
Ground
P
IN-TX
P
IN-ANT
P
IN-RX
T
OP
T
j
-40
42.5
dBm
Transmit pin 1
Transmit pin 2
Receive pin
Supply voltage (nominal 3.3V)
Digital control logic input 3
Digital control logic input 2
Digital control logic input 1
External Vss negative voltage control
Transmit pin 3
Transmit pin 4
Antenna pin
Exposed pad: ground for proper operation
27
27
85
135
dBm
dBm
°C
°C
V
DD
V3
V2
V1
Vss
EXT3
TX3
2
TX4
1,2
ANT
2
GND
Notes: 1. In a 2TX-1RX SP3T configuration, TX1 and TX2 are tied and TX3
and TX4 are tied respectively. Refer to Application Note AN35 for
SP3T performance data
2. Supply biased
3. Pulsed, 10% duty cycle of 4620 µs period
1. To operate the part as a 2TX-1RX SP3T, tie TX1 to TX2 and TX3
to TX4 respectively. Refer to Application Note AN35 for SP3T
performance data
2. RF pins 2, 4, 8, 21, 23 and 28 must be at 0V DC. The RF pins do
not require DC blocking capacitors for proper operation if the 0V DC
requirement is met
3. Use Vss
EXT
(pin 16) to bypass and disable internal negative voltage
generator. Connect Vss
EXT
(pin 16) to GND (Vss
EXT
= 0V) to enable
internal negative voltage generator
Document No. DOC-13014-3
│
www.psemi.com
©2012-2013 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 12
PSEMI [ Peregrine Semiconductor ]
