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PS12801ARN-0 参数 Datasheet PDF下载

PS12801ARN-0图片预览
型号: PS12801ARN-0
PDF下载: 下载PDF文件 查看货源
内容描述: 外形尺寸与框图 [OUTLINE DIMENSION & BLOCK DIAGRAM]
分类和应用:
文件页数/大小: 65 页 / 1282 K
品牌: POWERTIP [ POWERTIP TECHNOLOGY ]
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ST7066U  
!"Pin Function  
Name  
Number I/O Interfaced with  
Function  
Select registers.  
0: Instruction register (for write) Busy flag:  
address counter (for read)  
RS  
1
I
MPU  
1: Data register (for write and read)  
Select read or write.  
0: Write  
R/W  
E
1
1
I
I
MPU  
MPU  
1: Read  
Starts data read/write.  
Four high order bi-directional tristate data bus  
pins. Used for data transfer and receive  
between the MPU and the ST7066U. DB7 can  
DB4 to DB7  
DB0 to DB3  
4
4
I/O  
I/O  
MPU  
be used as a busy flag.  
Four low order bi-directional tristate data bus  
pins. Used for data transfer and receive  
between the MPU and the ST7066U.  
MPU  
These pins are not used during 4-bit operation.  
Clock to latch serial data D sent to the  
extension driver  
CL1  
CL2  
M
1
1
1
O
O
O
Extension driver  
Extension driver Clock to shift serial data D  
Switch signal for converting the liquid crystal  
drive waveform to AC  
Character pattern data corresponding to each  
segment signal  
Extension driver  
Extension driver  
D
1
O
Common signals that are not used are changed  
to non-selection waveform. COM9 to COM16  
are non-selection waveforms at 1/8 duty factor  
and COM12 to COM16 are non-selection  
COM1 to  
COM16  
O
16  
LCD  
waveforms at 1/11 duty factor.  
Segment signals  
SEG1 to  
SEG40  
40  
O
LCD  
Power supply for LCD drive  
V1 to V5  
5
2
-
-
Power supply  
Power supply  
VCC - V5 = 10 V (Max)  
VCC , GND  
V
CC : 2.7V to 5.5V, GND: 0V  
When crystal oscillation is performed, a resistor  
must be connected externally. When the pin  
input is an external clock, it must be input to OSC1.  
Oscillation  
resistor clock  
OSC1, OSC2  
2
Note:  
1. Vcc>=V1>=V2>=V3>=V4>=V5 must be maintained  
2. Two clock options:  
R=91KΩ(Vcc=5V)  
R=75KΩ(Vcc=3V)  
OSC1  
OSC2  
OSC1  
OSC2  
R
Clock  
input  
V2.0  
2001/03/01  
8/42  
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