ST7066U
!"Pad Arrangement
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG09
SEG08
SEG07
SEG06
SEG05
SEG04
SEG03
SEG02
SEG01
GND
SEG39
SEG40
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM09
COM08
COM07
COM06
COM05
COM04
COM03
COM02
COM01
DB7
1
2
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64
63
ST7066U
3
62
4
61
60
59
58
57
5
6
7
8
9
56
(0,0)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
55
54
53
Chip Size : 2300x3000μm
52
Coordinate : Pad Center
Origin : Chip Center
Min Pad Pitch : 120μm
Pad Size : 96x96μm
51
50
49
48
47
46
45
44
43
42
DB6
DB5
DB4
DB3
OSC1
DB2
24 25 26 27 28 29 30 31 32 33
3
35 36 37 38 39 40 41
Substrate Connect to VDD.
V2.0
2001/03/01
4/42
POWERTIP [ POWERTIP TECHNOLOGY ]
