TNY274-280
Undervoltage lockout is configured by R1 connected between
the DC bus and EN/UV pin of Uꢀ. When present, switching is
inhibited until the current in the EN/UV pin exceeds 21 μA. This
allows the startup voltage to be programmed within the normal
operating input voltage range, preventing glitching of the output
under abnormal low voltage conditions and also on removal of
the AC input.
8. Increased current limit is selected for peak and open frame
power columns and standard current limit for adapter
columns.
9. The part is board mounted with SOURCE pins soldered to a
sufficient area of copper and/or a heatsink is used to keep
the SOURCE pin temperature at or below ꢀꢀ0 °C.
ꢀ0. Ambient temperature of 10 °C for open frame designs and
40 °C for sealed adapters.
In addition to the simple input pi filter (Cꢀ, Lꢀ, C2) for differential
mode EMI, this design makes use of E-Shield™ shielding
techniques in the transformer to reduce common mode EMI
displacement currents, and R2 and C4 as a damping network
to reduce high frequency transformer ringing. These
techniques, combined with the frequency jitter of TNY278, give
excellent conducted and radiated EMI performance with this
design achieving >ꢀ2 dBμV of margin to EN11022 Class B
conducted EMI limits.
*Below a value of ꢀ, KP is the ratio of ripple to peak primary
current. To prevent reduced power capability due to premature
termination of switching cycles a transient KP limit of ≥0.21 is
recommended. This prevents the initial current limit (IINIT) from
being exceeded at MOSFET turn on.
For reference, Table 2 provides the minimum practical power
delivered from each family member at the three selectable
current limit values. This assumes open frame operation (not
thermally limited) and otherwise the same conditions as listed
above. These numbers are useful to identify the correct current
limit to select for a given device and output power requirement.
For design flexibility the value of C7 can be selected to pick one
of the 3 current limits options in Uꢀ. This allows the designer to
select the current limit appropriate for the application.
Overvoltage Protection
• Standard current limit (ILIMIT) is selected with a 0.ꢀ μF BP/M pin
capacitor and is the normal choice for typical enclosed
adapter applications.
The output overvoltage protection provided by TinySwitch-III
uses an internal latch that is triggered by a threshold current of
approximately 1.1 mA into the BP/M pin. In addition to an
internal filter, the BP/M pin capacitor forms an external filter
providing noise immunity from inadvertent triggering. For the
bypass capacitor to be effective as a high frequency filter, the
capacitor should be located as close as possible to the
SOURCE and BP/M pins of the device.
• When a ꢀ μF BP/M pin capacitor is used, the current limit is
reduced (ILIMITred or ILIMIT-ꢀ) offering reduced RMS device
currents and therefore improved efficiency, but at the expense
of maximum power capability. This is ideal for thermally
challenging designs where dissipation must be minimized.
• When a ꢀ0 μF BP/M pin capacitor is used, the current limit is
increased (ILIMITinc or ILIMIT+ꢀ), extending the power capability for
applications requiring higher peak power or continuous power
where the thermal conditions allow.
Peak Output Power Table
230 VAC ꢀ15
81-261 VAC
ILIMIT ILIMIT+1 ILIMIT-1 ILIMIT ILIMIT+1
ꢀ0.9 W 9.ꢀ W 7.ꢀ W 8.1 W 7.ꢀ W
Product
I
LIMIT-1
Further flexibility comes from the current limits between
adjacent TinySwitch-III family members being compatible. The
reduced current limit of a given device is equal to the standard
current limit of the next smaller device and the increased
current limit is equal to the standard current limit of the next
larger device.
TNY274P/G
TNY275P/G
TNY276P/G
TNY277P/G
TNY278P/G
TNY279P/G
TNY280P/G
8 W
ꢀ0.8 W ꢀ2 W ꢀ1.ꢀ W 8.4 W 9.3 W ꢀꢀ.8 W
ꢀꢀ.8 W ꢀ1.3 W ꢀ9.4 W 9.2 W ꢀꢀ.9 W ꢀ1.ꢀ W
ꢀ1.ꢀ W ꢀ9.6 W 23.7 W ꢀꢀ.8 W ꢀ1.3 W ꢀ8.1 W
ꢀ9.4 W 24 W
28 W ꢀ1.ꢀ W ꢀ8.6 W 2ꢀ.8 W
Key Application Considerations
23.7 W 28.4 W 32.2 W ꢀ8.1 W 22 W 21.2 W
28 W 32.7 W 36.6 W 2ꢀ.8 W 21.4 W 28.1 W
TinySwitch-lll Design Considerations
Output Power Table
Table 2.
Minimum Practical Power at Three Selectable Current Limit Levels.
The data sheet output power table (Table ꢀ) represents the
minimum practical continuous output power level that can be
obtained under the following assumed conditions:
ꢀ. The minimum DC input voltage is ꢀ00 V or higher for 81 VAC
input, or 220 V or higher for 230 VAC input or ꢀꢀ1 VAC with
a voltage doubler. The value of the input capacitance should
be sized to meet these criteria for AC input designs.
2. Efficiency of 715.
For best performance of the OVP function, it is recommended
that a relatively high bias winding voltage is used, in the range
of ꢀ1 V-30 V. This minimizes the error voltage on the bias
winding due to leakage inductance and also ensures adequate
voltage during no-load operation from which to supply the
BP/M pin for reduced no-load consumption.
3. Minimum data sheet value of I2f.
Selecting the Zener diode voltage to be approximately 6 V
above the bias winding voltage (28 V for 22 V bias winding)
gives good OVP performance for most designs, but can be
adjusted to compensate for variations in leakage inductance.
Adding additional filtering can be achieved by inserting a low
4. Transformer primary inductance tolerance of ꢀ05.
1. Reflected output voltage (VOR) of ꢀ31 V.
6. Voltage only output of ꢀ2 V with a fast PN rectifier diode.
7. Continuous conduction mode operation with transient KP*
value of 0.21.
9
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Rev. I 01/09
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