INT200
Pin Functional Description
Pin 1:
Pin 4:
Pin 6:
Active-low logic-level input HS IN
controls the pulse circuit which signals
the INT201 high-side driver.
COMconnection;analogreferencepoint
for the circuit.
Level shift output HSD 1 signals the
high-side driver to turn on. Two short,
precise pulses are sent on each negative
transition of HS IN.
Pin 5:
Pin 2:
Level shift output HSD 2 signals the
high-side driver to turn off. One short,
precise pulse is sent on each positive
transition of HS IN.
Active-high logic level input LS IN
controls the low side driver output.
Pin 7:
N/C for creepage distance.
Pin 3:
Pin 8:
LS OUT is the driver output which
controls the low-side MOSFET.
VDD supplies power to the logic, high-
side interface, and low-side driver.
HSD1
HSD2
LINEAR
REGULATOR
V
DD
PULSE
CIRCUIT
UV
LOCKOUT
HS IN
DELAY
LS OUT
LS IN
COM
PI-286F-043093
Figure 3. Functional Block Diagram of the INT200
F
1/96
2
POWERINT [ Power Integrations ]
