InnoSwitch3-CP
The turns ratio for the bias winding should be selected such that 7 V
is developed across the bias winding at the lowest rated output
voltage of the power supply at the lowest load condition. If the
voltage is lower than this, no-load input power will increase.
MOSFET at the instant of turn-off of the MOSFET during each
switching cycle though conventional RCD clamps can be used. RCDZ
clamps offer the highest efficiency. The circuit example shown in
Figure 11 uses an RCD clamp with a resistor in series with the clamp
diode. This resistor dampens the ringing at the drain and also limits
the reverse current through the clamp diode during reverse recovery.
Standard recovery glass passivated diodes with low junction
capacitance are recommended as these enable partial energy
recovery from the clamp thereby improving efficiency.
In USB PD or rapid charge applications, the output voltage range is
very wide. For example, a 45 W adapter would need to support 5 V,
9 V and 15 V and a 100 W adapter would have output voltages
selectable from 5 V to 20 V. Such a wide output voltage variation
results in a large change in bias winding output voltage as well.
A linear regulator circuit is generally required to limit the current
injected into the PRIMARY BYPASS pin of the InnoSwitch3-CP
(as shown in Figure 11).
Components for InnoSwitch3-CP
Secondary-Side Circuit
SECONDARY BYPASS Pin – Decoupling Capacitor
The bias current from the external circuit should be set to approximately
300 mA to achieve lowest no-load power consumption when operating
the power supply at 230 VAC input, (VBPP > 5 V). A glass passivated
standard recovery rectifier diode with low junction capacitance is
recommended to avoid the snappy recovery typically seen with fast
or ultrafast diodes that can lead to higher radiated EMI.
A 2.2 mF, 25 V multi-layer ceramic capacitor should be used for
decoupling the SECONDARY BYPASS pin of the InnoSwitch3-CP IC.
Since the SECONDARY BYPASS pin voltage needs to be 4.4 V before
the output voltage reaches the regulation voltage level, a significantly
higher BPS capacitor value could lead to output voltage overshoot
during start-up. Values lower than 1.5 mF may not offer enough
capacitance, and cause unpredictable operation. The capacitor must
be located adjacent to the IC pins. A 25 V rating is necessary to
guarantee a minimum aperture value in operation since the
capacitance of ceramic capacitors drops with applied voltage 10 V
rated capacitors are not recommended for this reason. Capacitors
with X5R or X7R dielectrics should be used for best results.
An aluminum capacitor of at least 22 mF with a voltage rating 1.2
times greater than the highest voltage developed across the capacitor
is recommended. Highest voltage is typically developed across this
capacitor when the supply is operated at the highest rated output
voltage and load with the lowest input AC supply voltage.
Line UV and OV Protection
Resistors connected from the UNDER/OVER INPUT VOLTAGE pin to
the DC bus enable sensing of input voltage to provide line
undervoltage and overvoltage protection. For a typical universal
input application, a resistor value of 3.8 MΩ is recommended.
Figure 17 shows circuit configurations that enable either the line UV
or the line OV feature only to be enabled.
When the output voltage of the power supply is 5 V or higher, the
supply current for the secondary-side controller is provided by the
OUTPUT VOLTAGE (VOUT) pin of the IC as the voltage at this pin is
higher than the SECONDARY BYPASS pin voltage. During start-up
and operating conditions where the output voltage of the power
supply is below 5 V, the secondary-side controller is supplied by
current from an internal current source connected to the FORWARD
pin. If the output voltage of the power supply is below 5 V and the
load at the output of the power supply is very light, the operating
frequency can drop significantly and the current supplied to the
secondary-side controller from the FORWARD pin may not be
sufficient to maintain the SECONDARY BYPASS pin voltage at 4.4 V.
For such applications, it is recommended that an additional active
preload be used as shown in Figure 12. This load is turned on by the
interface IC (or USB PD controller) when the output voltage of the
power supply is below 5 V.
InnoSwitch3-CP features a primary sensed OV protection feature that
can be used to latch-off the power supply. Once the power supply is
latched off, it can be reset if the UNDER/OVER INPUT VOLTAGE pin
current is reduced to zero. Once the power supply is latched off,
even after the input supply is turned off, it can take considerable
amount of time to reset the InnoSwitch3-CP controller as the energy
stored in the DC bus will continue to provide current to the controller.
A fast AC reset can be achieved using the modified circuit
configuration shown in Figure 18. The voltage across capacitor CS
reduces rapidly after input supply is disconnected reducing current
into the INPUT VOLTAGE MONITOR pin of the InnoSwitch3-CP IC and
resetting the InnoSwitch3-CP controller.
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Primary Sensed OVP (Overvoltage Protection)
The voltage developed across the output of the bias winding tracks
the power supply output voltage. Though not precise, a reasonably
accurate detection of the amplitude of the output voltage can be
achieved by the primary-side controller using the bias winding
voltage. A Zener diode connected from the bias winding output to
the PRIMARY BYPASS pin can reliably detect a secondary overvoltage
fault and cause the primary-side controller to latch-off. It is
recommended that the highest voltage at the output of the bias
winding should be measured for normal steady-state conditions
(at full load and lowest input voltage) and also under transient load
conditions. A Zener diode rated for 1.25 times this measured voltage
will typically ensure that OVP protection will only operate in case of a
fault.
Rꢀ
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Figure 12. Active Pre-Load Circuit.
Primary-Side Snubber Clamp
A snubber circuit should be used on the primary-side as shown in
Figure 11. This prevents excess voltage spikes at the drain of the
11
Rev. D 08/18
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