InnoSwitch3-CP
Output Overload Protection
sink. As this area is connected to the quiet source node, it can be
maximized for good heat sinking without compromising EMI
performance. Similarly for the output SR MOSFET, maximize the PCB
area connected to the pins on the package through which heat is
dissipated from the SR MOSFET.
For output voltage below the VPK threshold, the InnoSwitch3-CP IC
will limit the output current once the voltage across the IS and GND
pins exceeds the current limit or ISV(TH) threshold. This provides
current limited or constant current operation. The current limit is set
by the programming resistor between the ISENSE and SECONDARY
GROUND pins. For any output voltage above the VPK threshold,
InnoSwitch3-CP IC will provide a constant power characteristic. An
increase in load current will result in a drop in output voltage such
that the product of output voltage and current equals the maximum
power set by the product of VPK and set current limit.
Sufficient copper area should be provided on the board to keep the
IC temperature safely below the absolute maximum limits. It is
recommended that the copper area provided for the copper plane on
which the SOURCE pin of the IC is soldered is sufficiently large to
keep the IC temperature below 85 °C when operating the power
supply at full rated load and at the lowest rated input AC supply
voltage.
Interfacing with USB PD and Rapid Charge Controllers
A microcontroller can be used to alter the feedback voltage divider in
order to increase or decrease the output voltage. The interface IC
can also use the signal from the InnoSwitch3-CP ISENSE pin to sense
output current and provide current, power limiting or protection
features.
Y Capacitor
The Y capacitor should be placed directly between the primary input
filter capacitor positive terminal and the output positive or return
terminal of the transformer secondary. This routes high amplitude
common mode surge currents away from the IC. Note – if an input
pi-filter (C, L, C) EMI filter is used then the inductor in the filter should
be placed between the negative terminals of the input filter
capacitors.
Recommendations for Circuit Board Layout
See Figure 19 for a recommended circuit board layout for an
InnoSwitch3-CP based power supply.
Output SR MOSFET
Single-Point Grounding
For best performance, the area of the loop connecting the secondary
winding, the output SR MOSFET and the output filter capacitor,
should be minimized.
Use a single-point ground connection from the input filter capacitor to
the area of copper connected to the SOURCE pins.
Bypass Capacitors
ESD
The PRIMARY BYPASS and SECONDARY BYPASS pin capacitor must
be located directly adjacent to the PRIMARY BYPASS-SOURCE and
SECONDARY BYPASS-SECONDARY GROUND pins respectively and
connections to these capacitors should be routed with short traces.
Sufficient clearance should be maintained (>8 mm) between the
primary-side and secondary-side circuits to enable easy compliance
with any ESD / hi-pot requirements.
The spark gap is best placed directly between output positive rail and
one of the AC inputs. In this configuration a 6.4 mm spark gap is
often sufficient to meet the creepage and clearance requirements of
many applicable safety standards. This is less than the primary to
secondary spacing because the voltage across spark gap does not
exceed the peak of the AC input.
Primary Loop Area
The area of the primary loop that connects the input filter capacitor,
transformer primary and IC should be kept as small as possible.
Primary Clamp Circuit
A clamp is used to limit peak voltage on the DRAIN pin at turn-off.
This can be achieved by using an RCD clamp or a Zener diode
(~200 V) and diode clamp across the primary winding. To reduce
EMI, minimize the loop from the clamp components to the
transformer and IC.
Drain Node
The drain switching node is the dominant noise generator. As such
the components connected the drain node should be placed close to
the IC and away from sensitive feedback circuits. The clamp circuit
components should be located physically away from the PRIMARY
BYPASS pin and trace lengths minimized.
Thermal Considerations
The SOURCE pin is internally connected to the IC lead frame and
provides the main path to remove heat from the device. Therefore
the SOURCE pin should be connected to a copper area underneath
the IC to act not only as a single point ground, but also as a heat
The loop area of the loop comprising of the input rectifier filter
capacitor, the primary winding and the IC primary-side MOSFET
should be kept as small as possible.
14
Rev. D 08/18
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