InnoSwitch3-CE
Sufficient copper area should be provided on the board to keep the
IC temperature safely below the absolute maximum limits. It is
recommended that the copper area provided for the copper plane on
which the SOURCE pin of the IC is soldered is sufficiently large to
keep the IC temperature below 85 °C when operating the power
supply at full rated load and at the lowest rated input AC supply
voltage.
ESD
Sufficient clearance should be maintained (>8 mm) between the
primary-side and secondary-side circuits to enable easy compliance
with any ESD / hi-pot requirements.
The spark gap is best placed directly between output positive rail and
one of the AC inputs. In this configuration a 6.4 mm spark gap is
often sufficient to meet the creepage and clearance requirements of
many applicable safety standards. This is less than the primary to
secondary spacing because the voltage across spark gap does not
exceed the peak of the AC input.
Y Capacitor
The Y capacitor should be placed directly between the primary input
filter capacitor positive terminal and the output positive or return
terminal of the transformer secondary. This routes high amplitude
common mode surge currents away from the IC. Note – if an input
pi-filter (C, L, C) EMI filter is used then the inductor in the filter should
be placed between the negative terminals of the input filter
capacitors.
Drain Node
The drain switching node is the dominant noise generator. As such,
the components connected the drain node should be placed close to
the IC and away from sensitive feedback circuits. The clamp circuit
components should be located physically away from the PRIMARY
BYPASS pin and trace lengths minimized.
Output SR MOSFET
For best performance, the area of the loop connecting the secondary
winding, the output SR MOSFET and the output filter capacitor,
should be minimized.
The loop area of the loop comprising of the input rectifier filter
capacitor, the primary winding and the IC primary-side MOSFET
should be kept as small as possible.
14
Rev. D 08/18
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