InnoSwitch3-CE
The bias current from the external circuit should be set to approximately
300 mA to achieve lowest no-load power consumption when operating
the power supply at 230 VAC input, (VBPP > 5 V). A glass passivated
standard recovery rectifier diode with low junction capacitance is
recommended to avoid the snappy recovery typically seen with fast
or ultrafast diodes that can lead to higher radiated EMI.
Components for InnoSwitch3-CE
Secondary-Side Circuit
SECONDARY BYPASS Pin – Decoupling Capacitor
A 2.2 mF, 25 V multi-layer ceramic capacitor should be used for
decoupling the SECONDARY BYPASS pin of the InnoSwitch3-CE IC.
Since the SECONDARY BYPASS Pin voltage needs to be 4.4 V before
the output voltage reaches the regulation voltage level, a significantly
higher BPS capacitor value could lead to output voltage overshoot
during start-up. Values lower than 1.5 mF may not enough capacitance,
which can cause unpredictable operation. The capacitor must be
located adjacent to the IC pins. The 25 V rating is necessary to
guarantee the actual value in operation since the capacitance of
ceramic capacitors drops with applied voltage. 10 V rated capacitors
are not recommended for this reason. Capacitors with X5R or X7R
dielectrics should be used for best results.
An aluminum capacitor of at least 22 mF with a voltage rating 1.2
times greater than the highest voltage developed across the capacitor
is recommended. Highest voltage is typically developed across this
capacitor when the supply is operated at the highest rated output
voltage and load with the lowest input AC supply voltage.
Line UV and OV Protection
Resistors connected from the UNDER/OVER INPUT VOLTAGE pin to
the DC bus enable sensing of input voltage to provide line
undervoltage and overvoltage protection. For a typical universal
input application, a resistor value of 3.8 MΩ is recommended.
Figure 15 shows circuit configurations that enable either the line UV
or the line OV feature only to be enabled.
FORWARD Pin Resistor
A 47 Ω, 5% resistor is recommended to ensure sufficient IC supply
current. A higher or lower resistor value should not be used as it can
affect device operation such as the timing of the synchronous rectifier
drive. Figures 11, 12, 13 and 14 below show examples of unacceptable
and acceptable FORWARD pin voltage waveforms. VD is forward
voltage drop across the SR.
InnoSwitch3-CE features a primary sensed OV protection feature that
can be used to latch-off the power supply. Once the power supply is
latched off, it can be reset if the UNDER/OVER INPUT VOLTAGE pin
current is reduced to zero. Once the power supply is latched off,
even after the input supply is turned off, it can take considerable
amount of time to reset the InnoSwitch3-CE controller as the energy
stored in the DC bus will continue to provide current to the controller.
A fast AC reset can be achieved using the modified circuit
configuration shown in Figure 16. The voltage across capacitor CS
reduces rapidly after input supply is disconnected reducing current
into the INPUT VOLTAGE MONITOR pin of the InnoSwitch3-CE IC and
resetting the InnoSwitch3-CE controller.
Primary Sensed OVP (Overvoltage Protection)
ꢀ ꢁ
The voltage developed across the output of the bias winding tracks
the power supply output voltage. Though not precise, a reasonably
accurate detection of the amplitude of the output voltage can be
achieved by the primary-side controller using the bias winding
voltage. A Zener diode connected from the bias winding output to
the PRIMARY BYPASS pin can reliably detect a secondary overvoltage
fault and cause the primary-side controller to latch-off. It is
recommended that the highest voltage at the output of the bias
winding should be measured for normal steady-state conditions
(at full load and lowest input voltage) and also under transient load
conditions. A Zener diode rated for 1.25 times this measured voltage
will typically ensure that OVP protection will only operate in case of a
fault.
ꢁSꢂꢃꢄꢅꢆ
ꢁꢇ
ꢀꢁꢂ8ꢃꢄꢅꢂ0ꢆ1818
Figure 11. Unacceptable FORWARD Pin Waveform After Handshake with
SR MOSFET Conduction During Flyback Cycle.
Primary-Side Snubber Clamp
A snubber circuit should be used on the primary-side as shown in
Figure 10. This prevents excess voltage spikes at the drain of the
MOSFET at the instant of turn-off of the MOSFET during each
switching cycle though conventional RCD clamps can be used. RCDZ
clamps offer the highest efficiency. The circuit example shown in
Figure 10 uses an RCD clamp with a resistor in series with the clamp
diode. This resistor dampens the ringing at the drain and also limits
the reverse current through the clamp diode during reverse recovery.
Standard recovery glass passivated diodes with low junction
capacitance are recommended as these enable partial energy
recovery from the clamp thereby improving efficiency.
ꢀ ꢁ
ꢁSꢂꢃꢄꢅꢆ
ꢁꢇ
ꢀꢁꢂ8ꢃꢄꢃꢂ0ꢅ1818
Figure 12. Acceptable FORWARD Pin Waveform After Handshake with
SR MOSFET Conduction During Flyback Cycle.
11
Rev. D 08/18
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