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INN2003K 参数 Datasheet PDF下载

INN2003K图片预览
型号: INN2003K
PDF下载: 下载PDF文件 查看货源
内容描述: [IC OFFLINE SWITCH 15W 16ESOP]
分类和应用:
文件页数/大小: 26 页 / 2416 K
品牌: POWERINT [ Power Integrations ]
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InnoSwitch-CH  
The interaction between the leakage reactance of the secondary and  
the MOSFET capacitance (COSS) leads to ringing on the voltage  
waveforms at the instance of voltage reversal at the winding due to  
the primary MOSFET turn-on. This ringing can be suppressed using a  
RC snubber connected across the SR FET. A snubber resistor in the  
range of 10 to 47 may be used though a higher resistance value  
leads to noticeable drop in efficiency. A capacitance of 1 nF to 1.5 nF  
is adequate for most designs.  
Recommendations for Circuit Board Layout  
See Figure 20 for a recommended circuit board layout for  
InnoSwitch-CH IC.  
Single-Point Grounding  
Use a single-point ground connection from the input filter capacitor  
to the area of copper connected to the SOURCE pins.  
Bypass Capacitors  
Output Capacitor  
The PRIMARY BYPASS and SECONDARY BYPASS pin capacitor must  
be located directly adjacent to the PRIMARY BYPASS-SOURCE and  
SECONDARY BYPASS-SECONDARY GROUND pins respectively and  
connections to these capacitors should be routed with short traces.  
Low ESR aluminum electrolytic capacitors are suitable for use with  
most high frequency flyback switching power supplies though the use  
of aluminum-polymer solid capacitors have gained considerable  
popularity due to their compact size, stable temperature characteris-  
tics, extremely low ESR and simultaneously high RMS ripple current  
rating. These capacitors enable design of compact chargers and  
adapters.  
Primary Loop Area  
The area of the primary loop that connects the input filter capacitor,  
transformer primary and InnoSwitch-CH IC should be kept as small as  
possible.  
Typically, 200 mF to 300 mF of aluminum-polymer capacitance is often  
adequate for every ampere of output current. The other factor that  
influences choice of the capacitance is the output ripple. Care should  
be taken to ensure that capacitors with a voltage rating higher than  
the highest output voltage with sufficient margin (>20%) be used.  
Primary Clamp Circuit  
A clamp is used to limit peak voltage on the DRAIN pin at turn-off.  
This can be achieved by using an RCD clamp or a Zener diode (~200 V)  
and diode clamp across the primary winding. To reduce EMI, minimize  
the loop from the clamp components to the transformer and  
InnoSwitch-CH IC.  
Output Voltage Feedback Circuit  
The nominal output voltage feedback pin voltage is 1.265 V [VFB].  
A voltage divider network should be connected at the output of the  
power supply to divide the output voltage such that the voltage at the  
FEEDBACK pin will be 1.265 V when the output voltage is at the set  
nominal voltage. The lower feedback divider resistor should be tied  
to the SECONDARY GROUND pin. A 300 pF or higher decoupling  
capacitor should be connected at the FEEDBACK pin to the SECOND-  
ARY GROUND pin of the InnoSwitch-CH IC. This capacitor should be  
placed physically close to the InnoSwitch-CH IC. An R-C network  
may also need to be connected across the upper divider resistor in  
the feedback divider network. Capacitor value should be chosen such  
that the time constant matches with lower feedback divider to  
achieve better load regulation and lower output ripple. Recommended  
value for R is 1 kin order to limit the current flowing through the  
FEEDBACK pin in case of a short-circuit at the output.  
Thermal Considerations  
The SOURCE pin is internally connected to the IC lead frame and  
provides the main path to remove heat from the device. Therefore  
the SOURCE pin should be connected to a copper area underneath  
the InnoSwitch-CH IC to act not only as a single point ground, but  
also as a heat sink. As this area is connected to the quiet source  
node, this area should be maximized for good heat sinking. Similarly  
for output SR MOSFET, maximize the PCB area connected to the pins  
on the package through which heat is dissipated in the SR MOSFET.  
Sufficient copper area should be provided on the board to keep the  
InnoSwitch-CH IC temperature safely below the absolute maximum  
limits. It is recommended that the copper area provided for the  
copper plane on which the SOURCE pin of the InnoSwitch-CH IC is  
soldered is sufficiently large to keep the IC temperature below 85 °C  
when operating the charger at full rated load and at the lowest rated  
input AC supply voltage. Further de-rating can be applied depending  
on any additional specific requirements.  
Protection Diode for Secondary Current Shunt  
The InnoSwitch-CH IC includes a secondary-side current sense  
function which enables a precise CC mode of operation. The power  
supply transitions from CV to CC mode automatically when the output  
current exceeds the constant current regulation threshold as specified  
in the data sheet.  
Y Capacitor  
The placement of the Y capacitor should be directly from the primary  
input filter capacitor positive terminal to the output positive or return  
terminal of the transformer secondary. Such a placement will route  
high magnitude common mode surge currents away from the  
InnoSwitch-CH IC. Note – if an input π (C, L, C) EMI filter is used  
then the inductor in the filter should be placed between the negative  
terminals of the input filter capacitors.  
To sense the output the load current flows from the ISENSE pin  
through an internal shunt to the SECONDARY GROUND pin of the IC.  
The transition to CC operation occurs when the shunt voltage  
exceeds ~33 mV, the very low sensing voltage ensures very low  
dissipation.  
Output SR MOSFET  
During an output short-circuit the output filter capacitor (C10 in  
Figure 1) discharges instantaneously through the internal shunt.  
Depending on the output voltage, value of the output capacitance  
and short circuit impedance the energy dissipated in the shunt can  
be very high.  
For best performance, the area of the loop connecting the secondary  
winding, the output SR MOSFET and the output filter capacitor,  
should be minimized. In addition, sufficient copper area should be  
provided at the terminals of the SR MOSFET for heat sinking.  
ESD  
To prevent any damage to the IC, an external 1 A Schottky diode  
between the ISENSE and the SECONDARY GROUND pins is recom-  
mended for designs with an output voltage above 5 V, where the  
power supply can be shorted at the output terminals. When this  
diode is used, the anode should be connected to the ISENSE pin and  
the cathode should be connected to the SECONDARY GROUND pin.  
Sufficient clearance should be maintained (>8 mm) between the  
primary-side and secondary-side circuits to enable easy compliance  
with any ESD / hi-pot requirements.  
12  
Rev. J 10/17  
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