t
o
f
t
HIG
H
t
LO
W
t
r
t
LO
SCL
t
SUSTA
t
HDST
A
W
t
HDDA
t
SUDA
T
T
t
SUST
O
SDA
t
BU
F
Figure 2. I
2
C Timing Parameters
9
Typical Application
Figure 3. Typical Application Schematic of Multiple Output System with Digital Power Manager and I
2
C Interface
The schematic of a typical application of a DM7300 digital power manager (DPM) is shown in Figure 3. The system
includes four groups of dPwer Point Of Load converters (POLs). A group is defined as one or more POL converters
interconnected via OK pins. Grouping of the POLs enables users to program advanced fault management schemes
and define margining functions, monitoring, startup behavior, and reporting conventions.
All dPwer POL converters are connected to the DPM and to each other via a single-wire synchronization/data (SD)
line. The line provides synchronization of all POL converters to the master clock generated by the DPM and
simultaneously carries bidirectional data transfer between POL converters and the DPM. The DPM communicates via
the I2C bus with the host system and/or the Graphical User Interface.
ZD-00896 Rev. 5.2, 9-Apr-13
www.power-one.com
Page 8 of 36
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