CPD Series Data Sheet
200 – 250 Watt CompactPCI
®
DC-DC Converters
®
Thermal Considerations
If a converter CPD is mounted in an upright position with air
flow of 250 LFM (CPD200) or 400 LFM (CPD250) allowing
unrestricted forced air cooling, and is operated at its
nominal input voltage and power at maximum ambient
temperature
T
A max
(see:
Temperatures),
the temperature
measured at the measurement point of the case
temperature
T
C
(see:
Mechanical Data)
will approach the
indicated maximum value
T
C max
(105 °C) after an initial
warm-up phase. However, the relationship between
T
A
and
T
C
depends heavily on the operating conditions and
system integration. The thermal conditions are influenced
significantly by the input voltage, the output current, the
airflow, and the temperature of the adjacent elements and
surfaces.
T
A max
is therefore contrary to
T
C max
only an
indicative value.
P
o
/P
o nom
250 LFM = 1.25 m/s
1.0
05190-CPA200
Caution:
The installer must ensure that under all
operating conditions
T
C
remains within the limits shown in
the diagrams fig. 3 valid for a converter mounted in free
and quasi-stationary air, allowing unrestricted convection
cooling.
Note:
Forced-air cooling or an additional heat sink can
improve the reliability or allow
T
A
to be increased above
T
A max
provided that
T
C max
is not exceeded.
Thermal Protection
A temperature sensor fitted on the main PCB provides an
over temperature warning (degrade) signal 15 °C before
the temperature
T
c max
at which the thermal derating
begins to reduce the output power. The output power
returns to the nominal value, if the temperature drops
back below this limit. See
Temperature Warning and
Shut-Down.
P
o
/P
o nom
200 LFM = 1 m/s
1.0
05190a
0.6
0.5
Convection cooling
in upright position
0.6
0.5
Convection cooling
in upright position
400 LFM
= 2 m/s
0
T
A min
30
40
50
70
90 °C
0
T
A min
30
40
50
70
90 °C
Fig. 3a
Output power versus temperature T
A
(CPD200)
Fig. 3b
Output power versus temperature T
A
(CPD250)
Auxiliary Functions
Inhibit
The inhibit input enables (logic high, pull up) or disables
(logic low, pull down) all outputs, if a logic signal (TTL,
CMOS) is applied. In systems consisting of several
converters this feature may be used to control the
activation sequence of the converters by means of logic
signals, or to enable the source to start up, before full load
is applied.
Note:
If this function is not used, the inhibit pin 39 can be left
open (not connected). If pin 39 is connected to a return (e.g.
06153b
pin 24), the internal logic will disable all outputs. The inhibit
input is protected by a decoupling diode.
Table 5: Inhibit data
Characteristics
V
inh
Conditions min
typ max Unit
0.8
50
120
depending on
I
o
06155a
Inhibit
V
o
= off
V
i min
–
V
i max
–2
voltage
I
= 0 –
I
o max
V
o
= on
o
2.4
Rise time
Fall time
V
o
/V
o nom
1
0.1
0
Inhibit
1
0
V
t
r
t
f
ms
46
INH#
39
V
inh
47
RTN
(24)
t
t
r
t
f
t
Fig. 4
Definition of V
inh
.
NOV 28, 2006 revised to JAN 29, 2007
Fig. 5
Typical output response as a function of inhibit voltage.
Page 6 of 13
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