Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Table 22. Dataslice Signal Descriptions (Continued)
Name
I/O
Type
Description
DS0 credit enable tied high on physical DS device
0 only
crden0
crden1
ibpen0
I
I
I
CMOS
CMOS
CMOS
DS1 credit enable tied low on all DS devices
DS0 iBypass enable tied low on physical DS device
0 only
DS1 iBypass enable tied low on physical DS device
0 only
ibpen1
I
CMOS
ASIC Manufacturing Test Interface
(see Appendix B.2)
ce0_io
I
I
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Test (GND)
ce0_scan
Test (GND)
ce0_tstm3
lssd_ce1_a
lssd_ce1_b
lssd_ce1_c1
lssd_ce1_c2
lssd_ce1_c3
I
Test (GND)
I
Test (VDD)
I
Test (VDD)
I
Test (VDD)
I
Test (VDD)
I
Test (VDD)
lssd_scan_in[15:0]
lssd_scan_out[15:0]
mon[15:0]
I
Test: Scan input (GND)
Test: Scan output
Test (NC)
O
O
I
plltest_in
Test (GND)
plltest_out
O
Test output (NC)
Test (VDD) Should be driven to GND during reset.
All outputs are tristated when low.
test_di1
test_di2
I
I
CMOS
CMOS
Test (VDD) Should be driven to GND during reset.
All outputs are tristated when low.
test_lt
test_re
test_ri
I
I
I
CMOS
CMOS
CMOS
Test (VDD)
Test (GND)
Test (VDD)
140
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
