Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Enhanced Port Processor - Flow Control Crossbar
The redundant configuration is equivalent to that of the Dataslice to Crossbar configuration: A single CRC
error on one of the links can be ignored because the EPP will automatically use the valid information from
the other link. However, if the EPP receives four consecutive CRC errors on its primary FC crossbar link
then it will consider the link to have failed, and will make the other link the new primary link. See the
EFTCTRL register in the EPP for more details.
If CRC errors occur on both links during the same cell time then information will be lost, and the recovery
process described in the non-redundant configuration must be used to restore the correct state in the input
EPP.
Enhanced Port Processor - Scheduler
In a redundant Scheduler configuration, the redundant connection provides the uncorrupted information
between the Enhanced Port Processor and Scheduler. Figure 43 describes a simple redundant Scheduler
configuration where Enhanced Port Processor 1 and Enhanced Port Processor 2 are connected to both
Scheduler 0 and Scheduler 1. In this example, Scheduler 0 is the primary Scheduler and Scheduler 1 is
the secondary Scheduler.
Figure 43. Simple Redundant Scheduler Configuration
Enhanced
Enhanced
Port Processor 1
Port Processor 2
Scheduler 0
(primary)
Scheduler- 1
(secondary)
If, due to an error, the two Schedulers send different information to the EPPs then it is clearly essential that
all of the EPPs must use the information from the same Scheduler. Therefore, all of the Enhanced Port
Processors must use a consistent setting for their primary/secondary Scheduler, which is defined in the
EFTCTRL register in the EPP. The corrective action taken is different for CRC errors to/from the primary
Scheduler and CRC errors to/from the secondary Scheduler. These are described below.
If Enhanced Port Processor 1 receives a CRC error on information from Scheduler 0 (primary), then it uses
the uncorrupted grant information from Scheduler 1. Similarly, if Enhanced Port Processor 1 receives a
CRC error on information from Scheduler 1, then it uses the information from Scheduler 0. In both these
case, the CPU is notified of the error, but no corrective action is required by the CPU since the state
information remains consistent. However if the EPP sees four consecutive CRC errors on the link from its
96
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE