RELEASED
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Table 70. Crossbar to Dataslice Frame Format
Meaning
Field
Size (bits)
synched
VLD
1
1
AIB synched
1 if cell data is valid
Reserved
Cell Data
CRC
6
48
8
Cell Data
CRC computed over previous 56 bits
A.3 FRAME FORMATS - ENHANCED PORT PROCESSOR TO AND FROM
SCHEDULER
Table 71 shows the frame format from the Scheduler to the PP. Table 72 shows the frame format from the
EPP to the Scheduler. When the “Request Valid” is set to 0 but the “M/U” bit is set to 1, the frame is a
special control frame for the Scheduler.
Table 71. Scheduler to EPP Frame Format
Field
Size (bits)
Meaning
synched
Grant VLD
Grant DQ
Reserved
TDM Grant
Grant M/U
1
1
1
4
1
1
AIB Synched
1 if the grant is valid
1 if the grant should cause the cell to be dequeued
1 if the grant is for a TDM cell
1 if the grant is multicast, 0 if unicast
Grant
Priority
2
The priority of the grant
Grant Port
Reserved
RTag VLD
RTag Port
Freeze
5
2
1
5
1
The output port of the grant
1 if the routing tag is valid
The input port of the routing tag
1 if the EPP should be frozen, 0 if not.
Flow
Control
Crossbar
Sync
1
Flow Control Crossbar Sync bit
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
319
PMC [ PMC-SIERRA, INC ]
