Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
A third difference is that the EPP must maintain separate LCS request counters for each of the subports. It
must also maintain separate egress queues. So the number of queues can increase four-fold in order to
preserve the independence of each subport. Section 1.3 “Prioritized Best-Effort Queue Model” on page 30
describes the various queuing models in great detail.
1.2.6.1 Identifying the Source Subport
The EPP manages a single physical stream of cells at 25M cells/second. In subport mode the EPP must
look at each incoming cell and determine which subport has sent the cell. The LCS label field is used to
achieve this. Two bits within the label (referred to in the LCS Specification as MUX bits) are used to denote
the source subport, numbered 0 through 3. The MUX bits must be inserted in the LCS label before the cell
arrives at the EPP. The MUX bits might be inserted at the source linecards themselves. Alternatively, they
might be inserted by a four-to-one multiplexer device placed between the subport linecards and the EPP.
In this latter case, the multiplexer device might not be able to re-calculate the LCS CRC. For maximum
flexibility, the EPP can be configured to calculate the LCS CRC either with or without the MUX bits.
1.2.6.2 Egress Cell Rate
Within the EPP is an Output Scheduler process which is different from, and should not be confused with,
the ETT1 Scheduler device. At every OC-192 cell time, the Output Scheduler looks at the egress queues
and decides which cell should be forwarded to the attached egress linecard(s). In subport mode, the
Output Scheduler will constrain the egress cell rate so as not to overflow any of the 2.5 Gbit/s links. It does
this by operating in a strict round-robin mode, so that at any OC-192 cell time it will only try to send a cell
for one of the subports. The four 2.5 Gbit/s subports are labeled as 0 through 3 ; at some cell time the
Output Scheduler will only try to send a cell from the egress queues associated with subport 0. In the next
time, it will only consider cells destined for subport 1, etc. If, at any cell time, there are no cells to be sent to
the selected subport, then an Idle (empty) cell is sent. For example, if subports 0 and 3 are connected to
linecards but subports 2 and 4 are disconnected, then the Output Scheduler will send a cell to 0, then an
empty cell, then a cell to 3, then an empty cell, and then repeat the sequence. The effective cell rate
transmitted to each subport will not exceed 6.25 M cells per second.
1.2.7 LCS Control Packets
The LCS protocol provides in-band control packets. These packets (cells) are distinct from normal cell
traffic in that they do not pass through the fabric to an egress linecard, but are intended to cause some
effect within the switch.
There are two classes of Control Packets. The first class, referred to as CPU Control Packets, are
exchanged between the linecard and the ETT1 CPU (via the EPP and Dataslices). The intention is that
CPU Control Packets form the basic mechanism through which the linecard CPU and ETT1 CPU can
exchange information. This simple mechanism is subject to cell loss, and so should be supplemented by
some form of reliable transport protocol that would operate within the ETT1 CPU and the linecards.
The second class, referred to as LCS Control Packets, are used to manage the link between the linecard
and the ETT1 port. These LCS Control Packets can be used to start and stop the flow of cells on the link,
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PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
