RELEASED
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Default Value: 00000000h
Access:
Read/Write
TDM Control Register
Bits
Description
Enable TDM Sync. Set this bit to 1 to enable TDM sync to be sent out to all the Port
Processors. Default is 0 (TDM sync is off). This bit only controls the propagation of TDM Synch
out of the Scheduler, and does not affect the internal TDM PLL.
31
30
Load Initial Period. Set this bit to 1 and then 0 to cause the Scheduler to use the Initial Period
field in this register as the current TDM sync period. (Only used if the Scheduler generates
TDM Synch itself)
29:27 Reserved.
Initial Period. This can be used in conjunction with the Load Initial Period bit to set an initial
TDM period. Only use this if there is not a currently valid port supplying TDM sync and TDM
frame. (Only used if the Scheduler generates TDM Synch itself). This value is the initial period
minus one at which TDM sync signals will be issued to the Enhanced Port Processors
26:16
15:11 Reserved.
10:8
FIFO Depth. Leave this value set to zero.
Transmitted TDM Frame (0 or 1). This is the value of the TDM Table select that is sent to the
PPs when bit 6 is 0. (Only used if the Scheduler generates TDM Synch itself)
7
Current Port Valid. Indicates that the Current Port field is valid, i.e. there is a port that is
currently sending correct TDM sync and frame information to the Scheduler. This bit is 0 if the
Scheduler generates TDM Synch itself.
6
5
Reserved.
Current Port. Specifies the port which is currently sending suggested TDM sync signal and
TDM frame (which is echoed back out to all Port Processors). This field is irrelevant unless bit 6
is set. If these bits are modified then bit 6 should be set to 0 and then back to 1.
4:0
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
273
PMC [ PMC-SIERRA, INC ]
