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PM8621 参数 Datasheet PDF下载

PM8621图片预览
型号: PM8621
PDF下载: 下载PDF文件 查看货源
内容描述: NSE- 8G⑩标准产品数据表初步 [NSE-8G⑩ Standard Product Data Sheet Preliminary]
分类和应用:
文件页数/大小: 184 页 / 957 K
品牌: PMC [ PMC-SIERRA, INC ]
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NSE-8G™ Standard Product Data Sheet  
Preliminary  
Register 021H, 025H: CSTR #1 – 2* Interrupt Enable and CSU Lock Status  
Bit  
Bit 31-2  
Bit 1  
Bit 0  
Type  
R
R
Function  
Unused  
LOCKV  
Default  
X
X
0
R/W  
LOCKE  
This register configures the operation of CSTR block #1.  
LOCKE  
The CSU lock interrupt enable bit (LOCKE) controls the contribution of CSU lock state  
interrupts by the CSTR to the device interrupt INTB. When LOCKE is high, INTB is asserted  
low when the CSU lock state changes. Interrupts due to CSU lock state are masked when  
LOCKE is set low.  
LOCKV  
The CSU lock status bit (LOCKV) indicates whether the clock synthesis unit has successfully  
locked with the system clock. LOCKV is set low when the CSU has not successfully locked  
with the reference clock. LOCKV is set high if when the CSU has locked with the reference  
clock.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use  
Document ID: PMC-2010850, Issue 1  
83  
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