NSE-8G™ Standard Product Data Sheet
Preliminary
Figure 38 CMP Timing
SYSCLK
...
...
...
...
RC1FP
Valid
X
X
CMP
RJ0DLY + Delay (43 to 51
cycles) to J0
Delay to A1: 9696 cycles
TP[X]/
TN[X]
S4,3/
A2
S1,1/
C1
S2,1/
Z0
S1,1/
A1
S2,1/
A1
S3,1/
A1
...
...
Note: RC1FP may not occur every frame – it may occur every 1, 4 or 48 frames. RC1FP
synchronizes a 9720 count flywheel counter. The terminal count of this counter is used as an
internal substitute for RC1FP. In this way the CMP signal is always sampled at the C1 position
regardless of the RC1FP presence or absence at the C1 position.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
169
PMC [ PMC-SIERRA, INC ]
