NSE-8G™ Standard Product Data Sheet
Preliminary
Figure 32 Merged Graph...............................................................................................161
Figure 33 Relabeled Graph...........................................................................................162
Figure 34 Boundary Scan Architecture .........................................................................163
Figure 35 TAP Controller Finite State Machine.............................................................164
Figure 36 Receive Interface Timing ..............................................................................167
Figure 37 Transmit Interface Timing .............................................................................168
Figure 38 CMP Timing ..................................................................................................169
Figure 39 Microprocessor Interface Read Timing.........................................................173
Figure 40 Microprocessor Interface Write Timing .........................................................175
Figure 41 NSE-8G Input Timing....................................................................................176
Figure 42 RSTB Timing.................................................................................................177
Figure 43 JTAG Port Interface Timing...........................................................................179
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
9
PMC [ PMC-SIERRA, INC ]
