PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
PCI Offset
Register
0x508
0x50C
0x510
PMON Transmit FIFO Underflow Count
PMON Configurable Count #1
PMON Configurable Count #2
0x514 - 0x51C PMON Reserved
0x520 - 0x5BC Reserved
0x5C0
SBI EXTRACT Control
0x5C4 - 0x5C8 SBI EXTRACT Reserved
0x5CC
0x5D0
0x5D4
0x5D8
0x5DC
SBI EXTRACT Tributary RAM Indirect Access Address
SBI EXTRACT Tributary RAM Indirect Access Control
SBI EXTRACT Reserved
SBI EXTRACT Tributary RAM Indirect Access Data
SBI EXTRACT Parity Error Interrupt Reason
0x5E0 - 0x5FC SBI EXTRACT Reserved
0x600 - 0x67C Reserved
0x680
SBI INSERT Control
0x684 - 0x688
0x68C
0x690
SBI INSERT Reserved
SBI INSERT Tributary RAM Indirect Access Address
SBI INSERT Tributary RAM Indirect Access Control
SBI INSERT Reserved
0x694
0x698
SBI INSERT Tributary RAM Indirect Access Data
0x69C - 0x6FC SBI INSERT Reserved
0x700 - 0x7FC Reserved
The following PCI configuration registers are implemented by the PCI Interface.
These registers can only be accessed when the PCI Interface is a target and a
configuration cycle is in progress as indicated using the IDSEL input.
Table 16 – PCI Configuration Register Memory Map
PCI Offset
Register
0x00
Vendor Identification/Device Identification
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
85
PMC [ PMC-SIERRA, INC ]
