PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Register 0x480 – 0x488 : TCAS Links #0 to #2 Configuration
Bit
Type
Function
Default
Bit 31
to
Unused
XXXXXXXH
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
Reserved
Unused
Reserved
Reserved
Reserved
0
X
0
0
0
R/W
R/W
R/W
This register controls the operation of transmit links #0 to #2 when they are
configured to transmit data on the TD[2:0] outputs (i.e. SPEn_EN is low).
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
Reserved:
The reserved bits must be set low for correct operation of the FREEDM-
84P672 device.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
259
PMC [ PMC-SIERRA, INC ]
