PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Register 0x450 : TCAS SBI SPE3 Configuration Register #1
Bit
Type
Function
Default
Bit 31
to
Unused
XXXXH
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FEN[11]
FEN[10]
FEN[9]
FEN[8]
FEN[7]
FEN[6]
FEN[5]
FEN[4]
FEN[3]
FEN[2]
FEN[1]
FEN[0]
Unused
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
Bit 4
Bit 3
Bit 2
Bit 1
R/W
R/W
R/W
SBI_MODE[2]
SBI_MODE[1]
SBI_MODE[0]
Bit 0
This register configures the operational mode of transmit links 2, 5, 8, 11, … 35,
38, …83, i.e. those links mapped to SPE 3 of the SBI ADD BUS.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
255
PMC [ PMC-SIERRA, INC ]
