PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
RPDRRQE[15:0]:
The receive packet descriptor reference (RPDR) ready queue end bits
(RPDRRQE[15:0]) define bits 17 to 2 of the Receive Packet Descriptor
Reference Ready Queue end address. This register is initialised by the host.
The physical end address in the RPDRR queue is the sum of
RPDRRQE[15:0] left shifted by 2 bits with the RQB[31:0] bits in the RMAC
Receive Queue Base register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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