PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Register 0x214 : RHDL Indirect Block Data
Bit
Type
Function
Default
Bit 31
to
Unused
XXXXXH
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
BPTR[10]
BPTR[9]
BPTR[8]
BPTR[7]
BPTR[6]
BPTR[5]
BPTR[4]
BPTR[3]
BPTR[2]
BPTR[1]
BPTR[0]
X
0
0
0
0
0
0
0
0
0
0
0
This register contains data read from the block pointer RAM after an indirect
block read operation or data to be inserted into the block pointer RAM in an
indirect block write operation.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
BPTR[10:0]:
The indirect block pointer (BPTR[10:0]) configures the block pointer of the
block specified by the Indirect Block Select register. The block pointer to be
written to the block pointer RAM, in an indirect write operation, must be set up
in this register before triggering the write. The block pointer value is the block
number of the next block in the linked list. A circular list of blocks must be
formed in order to use the block list as a receive channel FIFO buffer.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
154
PMC [ PMC-SIERRA, INC ]
