PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Register 0x028 : FREEDM-84P672 Master SBI Interrupt Enable
Bit
Type
Function
Default
Bit 31
to
Unused
XXXXXXXXH
Bit 1
Bit 0
R/W
SBIEXTE
0
This register provides interrupt enables for various events detected or initiated by
the SBI circuitry within the FREEDM-84P672.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
SBIEXTE:
The SBI Extracter interrupt enable bit (SBIEXTE) enables interrupts from the
SBI Extract block to the PCI host. When SBIEXTE is set high, an interrupt
from the SBI Extract block will cause an interrupt to be generated on the
PCIINTB output. Interrupts are masked when SBIEXTE is set low. However,
the SBIEXTI bit remains valid when interrupts are disabled and may be polled
to detect interrupts from the SBI Extract Block.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
105
PMC [ PMC-SIERRA, INC ]
