RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
Register 0x400 : TCAS Indirect Link and Time-slot Select
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
R
R/W
BUSY
RWB
Unused
Reserved
Reserved
LINK[4]
LINK[3]
LINK[2]
LINK[1]
LINK[0]
Unused
TSLOT[4]
TSLOT[3]
TSLOT[2]
TSLOT[1]
TSLOT[0]
X
0
X
0
0
0
0
0
0
0
X
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 4
Bit 3
Bit 2
Bit 1
R/W
R/W
R/W
R/W
R/W
Bit 0
This register provides the link number and time-slot number used to access the
transmit channel provision RAM. Writing to this register triggers an indirect
register access and transfers the contents of the Indirect Channel Data register to
an internal holding register.
TSLOT[4:0]:
The indirect time-slot number bits (TSLOT[4:0]) indicate the time-slot to be
configured or interrogated in the indirect access. For a channelised T1/J1
link, time-slots 1 to 24 are valid. For a channelised E1 link, time-slots 1 to 31
are valid. For a H-MVIP link, time-slots 0 to 31 are valid. For unchannelised
links, only time-slot 0 is valid.
PROPRIETARY AND CONFIDENTIAL
135
PMC [ PMC-SIERRA, INC ]
