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PM7380-PI 参数 Datasheet PDF下载

PM7380-PI图片预览
型号: PM7380-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 帧引擎和数据链路管理32P672 [FRAME ENGINE AND DATA LINK MANAGER 32P672]
分类和应用:
文件页数/大小: 332 页 / 2479 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7380 FREEDM-32P672  
DATA SHEET  
PMC-1990262  
ISSUE 5  
FRAME ENGINE AND DATA LINK MANAGER 32P672  
13  
OPERATIONS  
This section presents connection details to the PM4388 TOCTL device, and  
operating details for the JTAG boundary scan feature.  
13.1 TOCTL Connections  
The required connections between the PM4388 TOCTL and the FREEDM-  
32P672 are shown in the following table:  
Table 32 – FREEDM–TOCTL Connections  
FREEDM-32P672 Direction  
Pin  
TOCTL Pin  
RCLK[n]  
RD[n]  
ICLK/ISIG[m]  
ID[m]  
H
H
n.c.  
IFP[m]  
H
TCLK[n]  
TD[n]  
EFP/RCLK/ESIG[m]  
ED[m]  
H
J
All 8 framers in the TOCTL should be programmed to operate in “Clock Master:  
NxDS0” mode in both the ingress and egress direction.  
13.2 JTAG Support  
The FREEDM-32P672 supports the IEEE Boundary Scan Specification as  
described in the IEEE 1149.1 standards. The Test Access Port (TAP) consists of  
the five standard pins, TRSTB, TCK, TMS, TDI and TDO used to control the TAP  
controller and the boundary scan registers. The TRSTB input is the active low  
reset signal used to reset the TAP controller. TCK is the test clock used to  
sample data on input, TDI and to output data on output, TDO. The TMS input is  
used to direct the TAP controller through its states. The basic boundary scan  
architecture is shown below.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
282