RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
Pin/ Enable
RCLK[4]
RD[4]
RCLK[3]
RD[3]
RCLK[2]
RD[2]
RCLK[1]
RD[1]
RCLK[0]
RD[0]
RMVCK[0]
RFPB[0]
RMV8FPC
RFP8B
RMV8DC
TDO
Register Bit
Cell Type
Device I.D.
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
IN_CELL
TAP Output
TAP Input
TAP Clock
TAP Input
TAP Input
0
0
1
1
1
0
0
1
1
1
0
0
1
0
0
-
TDI
TCK
TMS
TRSTB
-
-
-
-
Notes:
1. RMV8DC is the first bit of the scan chain (closest to TDI).
2. Enable cell pinname_OEN, tristates pin pinname when set high.
3. Cells ‘Logic 0’ and ‘Logic 1’ are Input Observation cells whose input pad is
bonded to VSS or VDD internally.
4. Cells titled ‘Unconnected’ are Output or Bi-directional cells whose pad is
unconnected to the device package. In the case of bi-directional cells, the
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
278
PMC [ PMC-SIERRA, INC ]
