RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
RQB[31:0]:
The receive queue base bits (RQB[31:0]) provides the base address of the
Large Buffer RPDR Free, Small Buffer RPDR Free and RPDR Ready queues
in PCI host memory. This register is initialised by the host. To calculate the
physical address of a particular receive queue element, the RQB bits are
added with the appropriate queue start, end, read or write index registers to
form the physical address.
The base address must be dword aligned and thus the least significant two
bits must be written to logic zero.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
159
PMC [ PMC-SIERRA, INC ]
