RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
Pin Name Type
Pin
Function
No.
TDO
Tristate U22
The test data output signal (TDO) carries test
data out of the FREEDM-32P672 via the IEEE
P1149.1 test access port. TDO is updated on the
falling edge of TCK. TDO is a tristate output
which is inactive except when scanning of data is
in progress.
Output
TRSTB
Input
Open
T21
The active low test reset signal (TRSTB) provides
an asynchronous FREEDM-32P672 test access
port reset via the IEEE P1149.1 test access port.
TRSTB is an asynchronous input with an integral
pull up resistor.
Note that when TRSTB is not being used, it must
be connected to the RSTB input.
NC1-50
These pins must be left unconnected.
Table 4 – Production Test Interface Signals (0 - Multiplexed)
Pin Name Type
Pin
No.
Function
TA[0]
TA[1]
TA[2]
TA[3]
TA[4]
TA[5]
TA[6]
TA[7]
TA[8]
TA[9]
TA[10]
TA[11]
Input
G23 The test mode address bus (TA[11:0]) selects
F23
E23
D22
E20
C23
A22
D20
B21
D19
B20
A19
specific registers during production test
(PMCTEST set high) read and write accesses.
TA[11:0] replace RD[21:10] when PMCTEST is
set high.
TA[12]/TR Input
S
A16
The test register select signal (TA[12]/TRS)
selects between normal and test mode register
accesses during production test (PMCTEST set
high). TRS is set high to select test registers and
is set low to select normal registers. TA[12]/TRS
replaces RD[24] when PMCTEST is set high.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
33
PMC [ PMC-SIERRA, INC ]
