欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM7380 参数 Datasheet PDF下载

PM7380图片预览
型号: PM7380
PDF下载: 下载PDF文件 查看货源
内容描述: 帧引擎和数据链路管理32P672 [FRAME ENGINE AND DATA LINK MANAGER 32P672]
分类和应用:
文件页数/大小: 332 页 / 2479 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM7380的Datasheet PDF文件第33页浏览型号PM7380的Datasheet PDF文件第34页浏览型号PM7380的Datasheet PDF文件第35页浏览型号PM7380的Datasheet PDF文件第36页浏览型号PM7380的Datasheet PDF文件第38页浏览型号PM7380的Datasheet PDF文件第39页浏览型号PM7380的Datasheet PDF文件第40页浏览型号PM7380的Datasheet PDF文件第41页  
RELEASED  
PM7380 FREEDM-32P672  
DATA SHEET  
PMC-1990262  
ISSUE 5  
FRAME ENGINE AND DATA LINK MANAGER 32P672  
Pin Name Type  
TRDYB I/O  
Pin  
Function  
No.  
R3  
The active low target ready signal (TRDYB)  
indicates when the target is ready to start or  
continue with a transaction. TRDYB works in  
conjunction with IRDYB to complete transaction  
data phases. During a transaction in progress,  
TRDYB is set high to indicate that the target  
cannot complete the current data phase and to  
force a wait state. TRDYB is set low to indicate  
that the target can complete the current data  
phase. The data phase is completed when  
TRDYB is set low and the initiator ready signal  
(IRDYB) is also set low.  
When the FREEDM-32P672 is the initiator,  
TRDYB is an input.  
When the FREEDM-32P672 is the target,  
TRDYB is an output. During accesses to  
FREEDM-32P672 registers, TRDYB is set high  
to extend data phases over multiple PCICLK  
cycles.  
When the FREEDM-32P672 is not involved in  
the current transaction, TRDYB is tristated.  
As an output signal, TRDYB is updated on the  
rising edge of PCICLK. As an input signal,  
TRDYB is sampled on the rising edge of  
PCICLK.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
26  
 复制成功!