RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
Register 0x3A4 : THDL Indirect Block Data
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
R/W
Reserved
Unused
Unused
Unused
Unused
Unused
Unused
BPTR[8]
BPTR[7]
BPTR[6]
BPTR[5]
BPTR[4]
BPTR[3]
BPTR[2]
BPTR[1]
BPTR[0]
0
X
X
X
X
X
X
0
0
0
0
0
0
0
0
0
Bit 8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This register contains data read from the transmit block pointer RAM after an indirect block read
operation or data to be inserted into the transmit block pointer RAM in an indirect block write
operation.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
BPTR[8:0]:
The indirect block pointer (BPTR[8:0]) configures the block pointer of the block specified by
the Indirect Block Select register. The block pointer to be written to the transmit block pointer
RAM, in an indirect write operation, must be set up in this register before triggering the write.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
185
PMC [ PMC-SIERRA, INC ]
