RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
Register 0x30C : TMAC Descriptor Table Base MSW
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TDTB[31]
TDTB[30]
TDTB[29]
TDTB[28]
TDTB[27]
TDTB[26]
TDTB[25]
TDTB[24]
TDTB[23]
TDTB[22]
TDTB[21]
TDTB[20]
TDTB[19]
TDTB[18]
TDTB[17]
TDTB[16]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This register provides the more significant word of the Transmit Descriptor Table Base address.
The contents of the companion TMAC Transmit Descriptor Table Base LSW register is held in a
holding register until a write access to this register, at which point, the base address of the
transmit descriptor table is updated.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
TDTB[31:0]:
The transmit descriptor table base bits (TDTB[31:0]) provides the base address of the
Transmit Descriptor Table in PCI host memory. This register is initialised by the host. To
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
159
PMC [ PMC-SIERRA, INC ]
