RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
Register 0x298 : RMAC Packet Descriptor Reference Large Buffer Free Queue Start
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RPDRLFQS[15]
RPDRLFQS[14]
RPDRLFQS[13]
RPDRLFQS[12]
RPDRLFQS[11]
RPDRLFQS[10]
RPDRLFQS[9]
RPDRLFQS[8]
RPDRLFQS[7]
RPDRLFQS[6]
RPDRLFQS[5]
RPDRLFQS[4]
RPDRLFQS[3]
RPDRLFQS[2]
RPDRLFQS[1]
RPDRLFQS[0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This register provides the Packet Descriptor Reference Large Buffer Free Queue start address.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
RPDRLFQS[15:0]:
The receive packet descriptor reference (RPDR) large buffer free queue start bits
(RPDRLFQS[15:0]) define bits 17 to 2 of the Receive Packet Descriptor Reference Large
Buffer Free Queue start address. This register is initialised by the host. The physical start
address of the RPDRLF queue is the sum of RPDRLFQS[15:0] left shifted by 2 bits with the
RQB[31:0] bits in the RMAC Receive Queue Base register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
142
PMC [ PMC-SIERRA, INC ]
